[ih] Intel 4004 vs the IMP

[Andrew G. Malis]

Jorge et al,

I have the possibly unique experience of having written 316/516 IMP code at
BBN (in assembler) while also, at MITRE, having written the code for an
8-bit 6502-based layer-2 Ethernet predecessor that used CSMA/CD on a
broadband local-area cable infrastructure (also in assembler) called
MITREnet. THe MITREnet units had a 6502 processor, a 2K!!!!! PROM for the
program memory, and I can't remember how much RAM for packet buffers and
variable memory, but it was probably 4K bytes. We had a computer interface,
cable radio interface, store and forward with queuing for the packets, and
of course CSMA/CD algorithms for cable transmission management. So you
could do an awful lot with a 6502 and a 2K PROM! While it wasn't up to
snuff with a 316/516 in terms of processing capacity, the 6502 would have
been sufficient for a very early router that handled packet ingress,
egress, queuing, and a simple routing protocol such as RIP.

After I left MITRE, they upgraded the MITRENET units in the early 80s to
use the Zilog Z8000, 32K of PROM for program memory, and 64K of RAM. The
upgraded units included TCP/IP, FTP, and TELNET implementations as well as
packet forwarding and high-speed (for the time) RS-422 DMA-based host
interfaces for PDP-11s and VAXes, so it would certainly have had enough
processing capacity to be a full router as well.

Cheers,
Andy


On Mon, Nov 15, 2021 at 10:41 AM Jorge Amodio via Internet-history <
internet-history at elists.isoc.org> wrote:

> Just as a time reference the first Proteon router, the p4200 was released
> in 1986, can't find now what processor they used, same year Cisco released
> the AGS, in those days the sexiest micro was the Motorola 68000 line.
>
> I doubt that anything in the line of the 6500/6800/8080 could match the
> HW316 or any of the other microcomputer CPU's at the time.
>
> Warm Regards
> Jorge
>
>
> On Mon, Nov 15, 2021 at 9:27 AM Clem Cole via Internet-history <
> internet-history at elists.isoc.org> wrote:
>
> > Lord I'm more typing challenged today than normal:
> > Well given these are the features of the 316
> >
> >
> > ᐧ
> >
> > On Mon, Nov 15, 2021 at 10:24 AM Clem Cole <clemc at ccc.com> wrote:
> >
> > >
> > >
> > > On Mon, Nov 15, 2021 at 9:19 AM Steve Crocker via Internet-history <
> > > internet-history at elists.isoc.org> wrote:
> > >
> > >> Might it be possible to pin down the crossover date?  That is, when
> did
> > a
> > >> microprocessor appear that was of the same power as the Honeywell 316?
> > >>
> > >> Well gioce these are the features of the 216:
> > >
> > > The programmers' model of the H-316 consisted of the following
> registers:
> > >
> > >
> > >    - The 16-bit *A* register was the primary arithmetic and logic
> > >       accumulator.
> > >       - The 16-bit *B* register was used for double-length arithmetic
> > >       operations.
> > >       - The 16-bit *program counter* holds the address of the next
> > >       instruction.
> > >       - A *carry flag* indicated arithmetic overflow.
> > >       - A 16-bit *X index* register was also provided for modification
> of
> > >       the address of operands.
> > >
> > > The instruction set <https://en.wikipedia.org/wiki/Instruction_set>
> had
> > > 72 arithmetic, logic, I/O and flow-control instructions.
> > >
> > > What I don't remember is the clock frequency, but I think it was in the
> > > order of .5-1Mz.  It used core which teneded to be slower than
> > > semiconductor memory at the time.
> > >
> > > So, I suspect if you just match the ISA's, first commercial
> > microprocessor
> > > to come close to that would have been the M6809 which was introduced in
> > > 1978, which had two 8-bit A/B accumulators which combined to single
> > 16-bit
> > > accumulator but also has a 16-bit D accumulator.  It also had 2 16 bit
> > > index registers (X and Y).   It was usually combined with semiconductor
> > > memory and clocked at 2 Mhz.
> > >
> > > The M68000 would come out as an experimental (unnumberred) chip for a
> 10
> > > of us a few months later and would be released for GA, in early/mid '79
> > [I
> > > was one of the people with the X-series chip at Tektronix, so I really
> > > don't remember the final GA time).  Certainly it would been workable.
> > >
> > > The question is if an 8-bit processor with a 16-bit address space like
> > the
> > > 8080/Z80 or 6800/6502 would have been good enough.  They all tended to
> > use
> > > semiconductor memory, so the memory speed of the 316 is likely to have
> > been
> > > able to be matched/exceeded.  But the question is open if the code when
> > > converted to 8-bit ops to perform what had been done in 16-bits would
> > have
> > > been reasonable.
> > >
> > > My >>WAG<< is that since so many slick video games got built on the
> 1Mhz
> > > 6502, I think an IMP might have been possible but  would have taken
> some
> > > very slick and careful coding I suspect.
> > >
> > > ᐧ
> > >
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> >
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