[ih] Intel 4004 vs the IMP

[Noel Chiappa]

    > From: Steve Crocker

    > the processing needs for a router weren't staying static ...  when did a
    > microprocessor appear that was powerful enough to serve as a router?

There are two things one has to look at in evaluating these early machines as
routers: speed and address space.

There was an additional complication because, as you note, the requirement
(along both axes) were not static - although initially they were pretty low.
I don't know _how_ low the speed axis was, because for the first generation of
routers, the attached networks (ARPANET, PRNET, etc) were pretty slow, and so
were the hosts, so IIRC 'packets/second' numbers were not high on our lists of
concerns. The routers worked, we were up to there in other issues, so we
didn't focus on speed. (Although I recall being pretty happy when the
MOS-based router I did at MIT out-performed the ELF-based router done by BBN.)

The very first router was the BBN one on a PDP-11/40, which although a
minicomputer, not a micro, is a useful benchmark. The -11/40 is about 1 MIP
(for register-register moves; see below) in processing performance, and the OS
used (ELF) did allow use of the memory management hardware, so it wasn't
limited to the 56KB of the 'basic' PDP-11.

The first routers at MIT (and also router-like devices at SRI, and probably
also Fuzzballs) were LSI-11's. Although technically not single-chip
microcomputers, they were effectively micros (4 VLSI chips on a smallish card
with some support circuitry). Their speed is hard to evaluate, since the
PDP-11 supported some complex, but slower, addressing modes.

E.g. a register-register MOV took 1.7 microseconds, but a memory-memory move
(with the addresses not in registers) seems to have taken 1.7+4.9=6.6 usec, so
about 1/5th of a MIP - and, like I said, that was enough 'oomph' for the early
routers.

If you look at the earliest 'true' micro, the 4004, it was never (that I know
of) used in a router, although its speed (a basic CPU clock of about 11 usec,
with instruction execution timea of 1 or 2 machine cycles) was probably
enough, compared to the slightly faster LSI-11 (whose most baroque memory
reference modes could take up to 7 usec, on top of the basic 1.7 of the
MOV). Its memory space, however, would have been an issue. Although it had a
12-bit address bus, allowing it to directly address 4K bytes of ROM, it could
only address 640 bytes of RAM, not really enough.

The 8008 was on the borderline of feasible.  Although it was a little slower
than the 4004, (.04 to .08 MIPS, at a CPU clock 800 KHz - it could be as slow
as 200KHz), its 14-bit address address bus allowed access to 16KB - just
barely enough, if it didn't need e.g. EGP (which came along later).

The 8080 was close to an LSI-11, so I'm pretty sure it would have been doable.

I quickly switched to the PDP-11/23 when it became available, and hacked the
code to keep packet buffers in high memory (mostly - some DMA interfaces like
the 3MBit Ethernet could only use the bottom 64KB), so the entire low 56KB was
available to hold code (e.g. EGP) and all other data.

	  Noel