[ih] Intel 4004 vs the IMP

[Noel Chiappa]

    > From: Jack Haverty

    > IIRC, another of the important criteria for selecting the Honeywell 516
    > was the I/O performance characteristics
    > ...
    > So in looking for the earliest "comparable" microprocessor, in addition
    > to comparing metrics such as CPU speed and memory, I think you have to
    > look at I/O characteristics

Yes, but... in a _router_, the CPU didn't need to _ever_ look at most of the
data in the packet. In anything that did TCP, yeah, you had to do the
checksum, and that almost always needed the CPU to fondle each byte, but in
e.g. the CGW, since it _never_ copied packets around (not even e.g. to make
room for a longet physical network header on the front), if a packet came in
one DMA interface, and out another, the CPU never even saw most of thwe bytes
in the packet, so the CPU speed was not too relevant, it was all bus-bandwidth
dependant.

Early on, not all network interfaces were DMA; there were three different
approaches:

 - DMA
 - full packet buffers in the interface, but the CPU had to manually move
   bytes from the interface to buffers in memory, so 3 bus cycles/word (with
   unrolled loop with pointers to device and buffer in registers i)
   instruction fetch, ii) read from interface, iii) write to memory) so 3
   times as much bus traffic per word, compared to DMA
 - interrupt per word

But even the latter wasn't _necessarily_ a problem; at MIT, the main ARPANET
gateway for quite a while used the Stanford/SRI 1822 Interface:

  https://gunkies.org/wiki/Stanford_1822_Interface

which was interrupt/byte, but peformance wasn't a problem (that I recall).

Like I said, for all early routers, performance was not an issue. Performance
only became an issue when there were multiple COTS router vendors, when
performance became an easy way for their marketing people to distinguish their
products from those of competitors. I doubt the users could ever have told.


I don't know if _early_ microprocessors (i.e. long before Motorola 68Ks, Intel
x86's, etc) supported DMA on theit memory busses; even for those that didn't,
it might have been possible to build an external bus controller, and either
stall the CPU (if the memory bus was busy doing DMA), or build a multi-port
main memory, or something.

     Noel